Banashree RENEWABLE ENERGY SYSTEM Pvt. Ltd. offers low power SOC solutions. 

 

We offers low power SOC solutions

PROPOSED SOLUTION

SoC and IP Analysis

– Identify different characteristics of SOC and IPs in design such as Pipelining, Data path Operators etc.
Library Analysis:
– Identify different characteristics of library such as Std Cells, Datapath Specific Std Cells, Complex Cells, Different Vts
DataPath Architecture Analysis:
– Identify different architecture characteristics of datapath
Post-Synthesis and Post-Physical Design Netlist Analysis
– Identify different characteristics of Netlist such as Std Cells, Drive Strengths etc.
Static Timing Analysis to prove No Timing Impact
Formal Verification to prove No Functional Impact
Power Analysis to compute Power Optimization

LOW POWER DESGIN METHODS

– Context Based Standard-cell architectures: Based on different contexts, new standard cell architectures are proposed. Eg: Full adder architecture must be different for Horizontal Carry propagation (Adder) & Vertical Carry propagation (Multiplier) scenarios.
– Knowing context priory (Eg: Non-Timing critical path), relax constraints & achieve power optimization
– For e.g in Existing Design, Horizontal Carry propagation: In Adder only Carry path is delay optimized
– In Proposed Design: Vertical Carry Propagation: In multiplier, the Full Adder cell both Sum & Carry paths are delay optimized.

Variable Vt low power optimization: Based on the available Vt’s (UHVT, HVT,LVT,ULVT) & Cells available, the simpler architecture is selected early in the optimization phase

 

ADVANCED LOW POWER METHODOLOGY

• Advanced Low Power Design Methodology (with custom datapath standard cells complimenting existing library
• Low Power standard cell library – Banashree has designed custom library cells that can optimize the power further by mapping the design to these new standard cell elements
• Embedded isolation of Sum & Carry paths
– Context Specific, Inverter elimination, Minimal Level, Interconnect aware Architectures
• Verify timing in PT for signoff
• Verify functionality using LEC flow
• Complete Power Analysis Flow
• Report Power & Compare with the normal/existing flows

Address

1234 Divi St. #1000
San Francisco, CA 29362

Phone

(346) 234-5675

Email

info@divielectric.com